ca quiz - Solution of Quiz #1 EEC 581, Fall 2010 1. Answer...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Solution of Quiz #1 EEC 581, Fall 2010 1. Answer True or False to the following statements. (All numbers are decimal numbers.) (a) sw $1, $3(100) is a legal MIPS instruction. FALSE (b) sw $1, 100($3) is a legal MIPS instruction. TRUE (c) add $4, $5, 100($3) is a legal MIPS instruction. FALSE (d) add $4, 200($4), 100($3) is a legal MIPS instruction. FALSE (e) lw $1, 102($3) is a legal MIPS instruction. TRUE / FALSE * * It can be FALSE because 102 is not a multiple of 4 (word). But it can be TRUE if ($3+102) is a multiple of 4 2. Answer the following questions. ($0 is always zero; i.e., it cannot be written.) Register Register (a) After executing add $5, $5, $6, what is $5? address content 204 | | (b) What is the content of [100]? 5 | 104 | 1100 6 | 100 | (c) After executing lw $1, 100($0), what is $1? | | 1100 | | (d) After executing the following, what is [100]? <--- word ----> lw $1, 100($0) (4 bytes or 32 bits) lw $2, 104($0) add $3, $1, $2 Memory Memory sw $3, 100($0) address content 1125 | | (e) What is the instruction that reads the memory 100 | 1100 | content at address 104 and stores to $5? 104 | 25 | lw $5, 104($0) | | | | <--- word ----> (4 bytes or 32 bits) 3. Translate the following MIPS code into a machine instruction. (Answer in binary notation, e.g., 01010101.0101) Hint: Instruction format for arithmetic instruction is 6- bit opcode, 5-bit rs (3 in this example), 5-bit rt (4), 5-bit rd (2), 5-bit shamt (0), and 6-bit function code. Opcode and function code for add are 0 and 32. add $2, $3, $4 000000 00011 00100 00010 00000 100000 Solution of Quiz #2 EEC 581, Fall 2010 1. The pipelined CPU executes the following 5 instructions. Assume $1=0x100, $2=0x200, etc. sub $11, $3, $2 ; $11 will be 0x100 (300-200) at CC5 and $12, $11, $4 ; $12 will be 0 (100 & 400) at CC6 or $13, $6, $11 ; $13 will be 0x700 (600 | 100) at CC7 add $14, $8, $9 sw $15, 100($2) Obviously, there exists data dependency on $11. The following figure does not have the forwarding unit and is given to demonstrate the problem. (a) What does the line (o) have during the 5 th cycle? (Hint: This must be an incorrect value because this architecture does not have the forwarding unit.) 1100 (b) The correct value of line (o) can be obtained by a feedback (forwarding). Which line does have the correct value for line (o)? (g) or (z) Instruction memory Address 4 32 Add Add result Shift left 2 Instruction IF/ID EX/MEM MEM/WB M u x 1 Add PC Address Write data M...
View Full Document

Page1 / 8

ca quiz - Solution of Quiz #1 EEC 581, Fall 2010 1. Answer...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online