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Decoders & Buffers

Decoders & Buffers - Y 2 Y 3 G S 1 S Decoders&...

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Decoders & Buffers Password_________________ © Copyright 2009 Daniel Tylavsky
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Starting w/ the decoder/demux function definition, lets design an (active high) decoder/demux. S 0 Y 0 Y 1 G 1:2 DeMux S 0 G Y 0 Y 1 0 G G 0 1 G 0 G By inspection: G S Y 0 0 = G S Y 0 1 = Decoders & Buffers S 0 G Y 0 Y 1 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 Alternate Definition Presentation
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Lets build the decoder/demux using AND/OR logic. S 0 Y 0 Y 1 G 1:2 DeMux G S Y 0 0 = G S Y 0 1 = Y 0 Y 1 G S 0 Decoders & Buffers
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TEAMS: Derive the output equations * for a 2:4 decoder/demultiplexer. S 1 Y 0 Y 1 G Y 2 Y 3 S 0 2:4 DeMux *By convention, the output receiving the input signal is that output whose subscript is the decimal equivalent of the applied binary applied. Decoders & Buffers
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Decoder Interpretation : Control Router. Demultiplexer Interpretation : Data Router. Active Low Decoder/Demultiplexer G S 1 S 0 Y 0 Y 1 Y 2 Y 3 0 0 0 0 1 1 1 0 0 1 1 0 1 1 0 1 0 1 1 0 1 0 1 1 1 1 1 0 1 X X 1 1 1 1 By inspection: 0 1 0 S S G Y + + = 0 1 1 S S G Y + + = Data In S 1 Y 0 Y 1 G Y 2 Y 3 S 0 2:4 DeMux Decoder 0 1 2 S S G Y + + = 0 1 3 S S G Y + + = Enable Decoders & Buffers
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Build an Active Low Decoder Using NAND Gates. (Use gate equivalency rules.) 0 1 0 S S G Y + + = 0 1 1 S S G Y + + = 0 1 2 S S G Y + + = 0 1 3 S S G Y + + = Y 0 Y 1
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Unformatted text preview: Y 2 Y 3 G S 1 S Decoders & Buffers ✔ TEAMS: Using ONLY 2:4 active-low decoders, show the paper design of a 3:8 active-low decoder* and validate it’s performance. *By convention, the active output should be that output whose subscript is the decimal equivalent of the applied binary address. Decoders & Buffers ✔ Buffers: ✔ Multiplexers are one way of allowing multiple signals to share access to one data bus. 4:1 Mux S 1 I I 1 Y I 2 I 3 S ✔ Another device that does the same thing is a buffer. ✔ You will be using two types of buffers: – Open Collector Buffer – Three-State Buffer ✔ Open “TriState.cct” Decoders & Buffers The End...
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