Synchronous Machines

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Unformatted text preview: Synchronous Machines Password_________________ © Copyright 2009 Daniel Tylavsky Synchronous Machines Any device that has memory and a control/clock input is called a sequential machine. Latches, flip-flops, and ripple counters are examples of sequential machines. When devices are synchronized so that all of their states change in synchronism with a clock pulse, we call them synchronous sequential machines or simply synchronous machines or finite state (synchronous) machines. Synchronous Machines To design synchronous machines, well need four tools: – Karnaugh Map – State Definition Table - A table listing all states, what they mean in plain English, and the binary value assigned to each state. (Toughest) • (States store the relevant history of our machine) Synchronous Machines – State Diagram - a directed graph with nodes representing states, arrows representing valid state transitions and annotations (on arrows) indicating the input conditions causing these transitions. State [Output] Input(s) X1,X2 – Transition Table - A listing of all possible state and input combinations, and the corresponding state transitions. Synchronous Machines EX: Build a 3-bit synchronous binary up/down counter using T flip-flops. Count Up(Down) when control input Up/Down =1(0). State Definition Table State S0 S1 S2 S3 S4 S5 S6 S7 Meaning Count is Count is Count is Count is Count is Count is Count is Count is 0 1 2 3 4 5 6 7 Binary Assignment 000 001 010 011 100 101 110 111 State (Transition) Diagram 1 S7 S0 0 1 1 0 S6 S1 1 1 0 S5 S2 1 1 0 0 S4 S3 1 0 0 0 Synchronous Machines – Enter the State Transition Diagram Information into a Transition Table. State (Transition) Diagram 1 S7 S0 0 1 1 0 S6 S1 1 1 0 S5 S2 1 1 0 0 S4 S3 1 0 0 0 Transition Table Present S tate S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 Next S tate S1 S2 S3 S4 S5 S6 S7 S0 S7 S0 S1 S2 S3 S4 S5 S6 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 Input Control – Fill-in the Transition Table. Binary Representation Present State Next State Input Control 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 Present S tate S0 0 1 S1 S2 2 3 S3 S4 4 5 S5 S6 6 7 S7 S0 0 1 S1 S2 2 3 S3 S4 4 5 S5 S6 6 7 S7 Next S tate S1 1 2 S2 S3 3 4 S4 S5 5 6 S6 S7 7 0 S0 S7 7 0 S0 S1 1 2 S2 S3 3 4 S4 S5 5 6 S6 QC C 0 0 0 0 1 1 1 1 QB B 0 0 1 1 0 0 1 1 QA A 0 1 0 1 0 1 0 1 C QC Flip-Flp Input + 0 0 0 1 1 1 1 0 B QB + 0 1 1 0 0 1 1 0 A QA + INDIVIDUALLY: 1 Fill in the 0 remaining rows of 1 the table. 0 1 0 1 0 – Complete the Transition Table. Binary Binary Representation Present State Next State Input Control QC 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 QB 0 0 1 1 0 0 1 1 QA 0 1 0 1 0 1 0 1 QC Flip-Flp Input + QB + QA + TC 0 0 0 1 0 0 0 1 TB 0 1 0 1 0 1 0 1 TA 1 1 1 1 1 1 1 1 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 INDIVIDUALLY: Fill in the remaining rows of the table. Excitation Table. Q 0 0 1 1 Q+ 0 1 0 1 D 0 1 0 1 T 0 1 1 0 J 0 1 X X K X X 1 0 Using Karnaugh Maps find the minimum SOP forms for the functions TC, TB, and TA, as functions of Y(Input QB QA TC Control), QC, QB, and QA. Y QC 00 01 11 10 Binary Representation Input Control Y 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 Present State QC 0 0 0 0 1 1 1 1 QB 0 0 1 1 0 0 1 1 QA 0 1 0 1 0 1 0 1 QC Next State Flip-Flp Input Synchronous Machines 00 01 11 10 QB QA Y QC 00 01 11 10 QB QA Y QC 00 01 11 10 + 0 0 0 1 1 1 1 0 QB + 0 1 1 0 0 1 1 0 QA + 1 0 1 0 1 0 1 0 TC 0 0 0 1 0 0 0 1 TB 0 1 0 1 0 1 0 1 TA 1 1 1 1 1 1 1 1 0 0 00 0 0 TB 01 1 1 11 0 0 10 0 0 00 1 1 TA 01 1 1 11 0 0 10 Individually: Complete the Karnaugh maps and find the minimum SOP forms for TC, TB, and TA. 1 1 1 1 1 1 1 1 Synchronous Machines The final design of the circuit is: Open “UpDown.cct” and verify its performance. Synchronous Machines Teams: Design a modulo-3 synchronous counter using JK flip-flops. (I am selecting the count sequence 00, 01, 11.) How many flip-flops will you need? The excitation table below may be useful. Excitation Table. Q 0 0 1 1 Q+ 0 1 0 1 D 0 1 0 1 T 0 1 1 0 J 0 1 X X K X X 1 0 The End Binary Representation Input Control Y 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 Present S tate S0 S1 S2 S3 S4 S5 S6 S7 S0 S1 S2 S3 S4 S5 S6 S7 Next S tate S1 S2 S3 S4 S5 S6 S7 S0 S7 S0 S1 S2 S3 S4 S5 S6 Present State QC 0 0 0 0 1 1 1 1 QB 0 0 1 1 0 0 1 1 QA 0 1 0 1 0 1 0 1 QC Next State Flip-Flp Input + 0 0 0 1 1 1 1 0 QB + 0 1 1 0 0 1 1 0 QA + 1 0 1 0 1 0 1 0 TC 0 0 0 1 0 0 0 1 TB 0 1 0 1 0 1 0 1 TA 1 1 1 1 1 1 1 1 Synchronous Machines QB QA Y QC 00 01 11 10 QB QA Y QC 00 01 11 10 QB QA Y QC 00 01 11 10 00 TC 01 11 10 0 0 00 0 0 TB 01 1 1 11 0 0 10 0 0 00 1 1 TA 01 1 1 11 0 0 10 1 1 1 1 1 1 1 1 Synchronous Machines Transition Table Binary Representation Present State Next State Present Next State State S0 S1 S2 S3 QB QA QB + QA+ JB Flip-Flop Inputs KB JA KA Karnaugh Maps QA QB 0 1 0 JB = 1 0 1 QA QB 0 KB = 1 0 1 QA QB 0 JA= 1 QA QB 0 1 0 KA= 1 ...
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