{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

Lab 3 Report - Lab 3 Report FSM for 4-bit Up/Down Counter...

Info icon This preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
Lab 3 Report: FSM for 4-bit Up/Down Counter Student Information: Jonathan Sooter [email protected] Partner: Corey Davis Lab Purpose: The purpose of this lab was to create a Finite State Machine that counts either up or down every second depending on the Up/down input switch. Since the counter has a memory of 4-bits the counter can count from 0 to 15 and is designed to wrap around when it reaches 15 counting up or 0 counting down. The lab also uses an Enable switch that pauses the counter at the current value and a reset switch that sets the counter back to 0. Implementation Details: The first thing to do when creating a Finite State Machine is to draw a state diagram. The state machine for this lab is fairly simple in that all states go to the default state of 0 when the reset is1, they stay at their current state if enable is 0, and if those two conditions aren't met every state goes to the next or previous state based on the Up/Down switch. There are 16 states, one for each possible output of the counter, 0 through 15. Next thing to do is set each state to a 4-bit value. Since the output area already a 4-bit value, each state can be conveniently set to its corresponding output so state 0000 will output 0, 0001 outputs 1, 0010 outputs 2, etc. To create the FSM in Verilog code, two always statements will be used. The first will trigger every clock cycle and update the current state to the value determined as the next state and the second always will trigger every time the state changes or the inputs change. The following is the commented Verilog code for the FSM: `timescale 1ns / 1ps module fsm_4bit_counter(input wire clk, rst, enable, up_dwn, output reg [3:0] cnt); reg [3:0] st, next_st; /* s_0 - s_F are the possible states the counter can be in. s_0 outputs 0000, s_1 outputs 0001, ... , s_F outputs 1111. I used 'h instead of 'b because its less typing. */
Image of page 1

Info icon This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document Right Arrow Icon
parameter s_0 = 'h0, s_1 = 'h1, s_2 = 'h2, s_3 = 'h3, s_4 = 'h4, s_5 = 'h5, s_6 = 'h6, s_7 = 'h7, s_8 = 'h8, s_9 = 'h9, s_A = 'hA, s_B = 'hB, s_C = 'hC, s_D = 'hD, s_E = 'hE, s_F = 'hF; /* This always triggers every clock cycle or whenever the reset button is pushed. If the clock cycles the st goes to whatever is defined as the next state. If reset is pushed or being held down while the clock cycles, the state is set to s_0 (0000). The posedge rst makes this always loop trigger when rst is pushed making the counter goto 0 right away instead of waiting for the next clock cycle. */ always @(posedge clk, posedge rst) begin st <= rst ? s_0 : next_st; end /* This always triggers when the state changes which happens every clock cycle the counter is enabled or when the enable or up/down inputs are changed */ always @(st, enable, up_dwn) begin // Since the state values coorespond to the output at that state // we can just set the output to the state variable. cnt <= st; if (~enable) next_st <= st; else begin case (st) // Go through each state and define the next state based // on whether the up/down switch is 1 or 0 // Using shorthand if statements: // (condition) ? IfTrueVal : IfFalseVal /* The following shorthand if statement is exactly the same as if the following code was written out for each state.
Image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}

What students are saying

  • Left Quote Icon

    As a current student on this bumpy collegiate pathway, I stumbled upon Course Hero, where I can find study resources for nearly all my courses, get online help from tutors 24/7, and even share my old projects, papers, and lecture notes with other students.

    Student Picture

    Kiran Temple University Fox School of Business ‘17, Course Hero Intern

  • Left Quote Icon

    I cannot even describe how much Course Hero helped me this summer. It’s truly become something I can always rely on and help me. In the end, I was not only able to survive summer classes, but I was able to thrive thanks to Course Hero.

    Student Picture

    Dana University of Pennsylvania ‘17, Course Hero Intern

  • Left Quote Icon

    The ability to access any university’s resources through Course Hero proved invaluable in my case. I was behind on Tulane coursework and actually used UCLA’s materials to help me move forward and get everything together on time.

    Student Picture

    Jill Tulane University ‘16, Course Hero Intern