quiz3_sol

# quiz3_sol - t pHL x,z = t pLH G 1 t pHL G 2 t pLH G 3 t pHL...

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[CSM51A F10] Quiz 3 Solution 10/22/10 TAs: Pouya Dormiani ([email protected]), Jet Jiang ([email protected]) Time Allowed: 15 minutes Closed Book. No Notes. No calculators or electronic devices. Problem 1 G 1 G 2 G 3 G 4 G 5 G 6 1 . 3 1 . 7 2 . 2 L z = 4 . 0 x z For the above gate network, the load factor values are marked at the corresponding pins of G 4, and L z is the output load value of G 6. Calculate the following network delay, using the following table of CMOS gates characteristics. Gate t pLH t pHL Load Factor I Not 1 + 2L 2 + L 1 And2 2 + 2L 3 + 2L 1 Nor3 2 + L 2 + 3L 1 Xor3 3 + 2L 3 + 3L As Marked 1. t pLH ( x, z ) Solution: Note there are 3 negates in the path from x to z , and we want to compute the L H delay at the output z . First, we observe the load values for all the gates: L G 1 = 1, L G 2 = 1 + 1 . 3 = 2 . 3, L G 3 = 1 + 1 = 2, and L G 6 = 4. Then we have: t pLH ( x, z ) = t pHL ( G 1) + t pLH ( G 2) + t pHL ( G 3) + t pLH ( G 6) = (3 + 2 L G 1 ) + (2 + L G 2 ) + (2 + L G 3 ) + (2 + L G 6 ) = (3 + 2) + (2 + 2 . 3) + (2 + 2) + (2 + 4) = 19 . 3 2. t pHL ( x, z ) 1

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Unformatted text preview: t pHL ( x,z ) = t pLH ( G 1) + t pHL ( G 2) + t pLH ( G 3) + t pHL ( G 6) = (2 + 2 L G 1 ) + (2 + 3 L G 2 ) + (1 + 2 L G 3 ) + (2 + 3 L G 6 ) = (2 + 2) + (2 + 3 × 2 . 3) + (1 + 2 × 2) + (2 + 3 × 4) = 31 . 9 Problem 2 1. What are the essential prime implicates of the following switching function? Solution x 3 x 2 x 1 x f ( x 3 ,x 2 ,x 1 ,x ) 1 1 1-1 1-1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1-x x 1 x 2 x 3 1--1 1 1 1-All implicates are prime: ( x + x 3 ), ( x + x 2 ), ( x 1 + x 2 ), ( x + x 2 + x 3 ). 2. Show the two-level Nor-Nor implementation, assume complemented inputs are available. Solution x x x x 2 x 2 x 3 x 1 x 2 x 3 z 2...
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