EE4313Fall2010_Syllabus

EE4313Fall2010_Syllabus - , by Pong P. Chu, ISBN...

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EE4313 Syllabus Class Meets: Tuesdays, 6:00 pm to 8:40 pm, @JAB674 Open Lab: 7:40 pm to 8:40 pm, @JAB674 Course Description In this course we will learn how to model, simulate and synthesize digital logic using a hardware description language (VHDL will be the hardware description language). Initially we will model simple digital logic building blocks (AND, OR, XOR, Multiplexer, Demultiplexer, Flip Flop, etc.). Then we will model larger digital logic building blocks (Rotate by a fixed amount, Data dependent rotate, add and subtract. Finally, we will compose these building blocks into a large digital logic data path and controller. Instructor: N. Sertac Artan Office Hours: Fridays, 3:00 pm to 5:00 pm Office: LC 105, Tel: (718) 260-3496, E-mail: sartan at poly, URL: http://eeweb.poly.edu/artan Teaching Assistant: Vivek Pujeri Office Hours: Mondays, 2:30 pm to 4:30 pm Office: TBA E-mail: vpujer01 at students poly No textbooks, 3 reference books: 1. FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version
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Unformatted text preview: , by Pong P. Chu, ISBN 0470185317. 2. Hardware Design Using VHDL: Coding for Efficiency, Portability, and Scalability , by Pong P. Chu, ISBN 0471720925. 3. Advanced FPGA Design: Architecture, Implementation, and Optimization , by Steve Kilts, ISBN 0470054379. FPGA Board to purchase (Instead of a textbook) Digilent Nexys2 FPGA Board ($99) Choose the 500K gate and academic options Link to Board Website Grading: Class Participation 10% Quizzes 10% Exam 1 20% Exam2 20% Homework/Labs 20% Term Project 20% Topics: 1. Structural, functional, and behavioral modeling of digital logic blocks with VHDL a. Modeling of combinational and sequential logic b. Modeling Finite state machines 2. Functional and Timing Simulation using Modelsim 3. Synthesis, and mapping of digital logic models to Xilinx FPGAs using Xilinx ISE Webpack 4. Downloading the design to FPGA and verifying design implemented on hardware 5. Model, simulate and verify a real-life application...
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This note was uploaded on 11/02/2010 for the course EE 4313 taught by Professor Artansetac during the Spring '10 term at NYU Poly.

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