{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

Lab3 - ‘SOP4’ in your EL5473 library In this schematic...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
EL 5473 Introduction to VLSI Design Lab Assignment 3 Due beginning of Class March 27, 2010 Before starting the lab itself, complete Tutorial 3 and you may want the TA to check off that it has been completed successfully. 1. Create a 2-input NAND schematic in your EL5473 library. Make sure the unit size for this gate is 600 nm as it was in lab 2. You may want to refer to tutorial 1 for help creating a schematic. 2. With the 2-input NAND schematic open, create a symbol for it using what was learned in tutorial 3. 3. Check and Save your design. Fix any problems that might exist. You cannot move on unless Check and Save passes with no errors. 4. From the Library Manager create a new schematic cell view and name it
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: ‘SOP4’ in your EL5473 library. In this schematic view, implement the following function using the NAND symbol created in part (1): F = AB + CD. Check and Save your design. 5. Open Analog Environment to run a simulation on your new schematic. Set up the input signals A, B, C, and D as pulse wave forms each with a period of 4 ns. 6. Run a transient simulation for two clock periods (8 ns). From your results, use the calculator and waveform viewer to determine t pdf , t pdr , t pd , t rise , and t fall . 7. Deliverables: The schematic, resulting waveforms, and delay measurements....
View Full Document

{[ snackBarMessage ]}

Ask a homework question - tutors are online