EE3193 VLSI Lab4

EE3193 VLSI Lab4 - DLATCH2 Schematic - refer to Appendix...

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EE 3193 Introduction to Very Large Scale Integrated Circuits Lab 4: DLATCH Zhou, HuanXian 0225418 Due date: April 9, 2010 Abstract 1. Schematic 2. Waveform 3. DRC 4. Extracted view Introduction The objective of this lab is to modify the DLATCH to a two non-overlapping clocks DLATCH. And verify with simulation, DRC LVS. DLATCH Simulation Waveforms - refer to Appendix I-a DLATCH DRC - refer to Appendix I-b DLATCH Extracted View - refer to Appendix I-c DLATCH LVS - refer to Appendix I-d
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Unformatted text preview: DLATCH2 Schematic - refer to Appendix II-a DLATCH2 Waveforms - refer to Appendix II-b DLATCH2 Layout - refer to Appendix II-c DLATCH2 DRC - refer to Appendix II-d DLATCH2 Extracted View - refer to Appendix II-e DLATCH2 LVS - refer to Appendix II-f Appendix I) DLATCH a) Waveform b) DRC c) Extracted View d) LVS II) DLATCH2 a) Schematic b) Waveform c) Layout d) DRC e) Extracted View f) LVS...
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EE3193 VLSI Lab4 - DLATCH2 Schematic - refer to Appendix...

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