13.1-gpus-3 - CS6230 HPC Tools and Applications...

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CS6230 HPC Tools and Applications Heterogeneous Computing with GPUs Jeffrey S. Vetter Computational Science and Engineering College of Computing Georgia Institute of Technology http://ft.ornl.gov/~vetter vetter@computer.org
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THE CUDA PROGRAMMING MODEL Courtesy of David Kirk/NVIDIA and Wen-mei W. Hwu, 2007-2009 ECE 498AL Spring 2010, University of Illinois, Urbana-Champaign 3
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4 CUDA C ompute Unified Device A rchitecture” General purpose programming model User kicks off batches of threads on the GPU GPU = dedicated super-threaded, massively data parallel co-processor Targeted software stack Compute oriented drivers, language, and tools Driver for loading computation programs into GPU Standalone Driver - Optimized for computation Interface designed for compute graphics-free API Data sharing with OpenGL buffer objects Guaranteed maximum download & readback speeds Explicit GPU memory management
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5 An Example of Physical Reality Behind CUDA CPU (host) GPU w/ local DRAM (device)
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6 CUDA C with no shader limitations! Integrated host+device app C program Serial or modestly parallel parts in host C code Highly parallel parts in device SPMD kernel C code Serial Code (host) . . . . . . Parallel Kernel (device) KernelA<<< nBlk, nTid >>>(args); Serial Code (host) Parallel Kernel (device) KernelB<<< nBlk, nTid >>>(args);
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7 CUDA Devices and Threads A compute device Is a coprocessor to the CPU or host Has its own DRAM ( device memory ) Runs many threads in parallel Is typically a GPU but can also be another type of parallel processing device Data-parallel portions of an application are expressed as device kernels which run on many threads Differences between GPU and CPU threads GPU threads are extremely lightweight Very little creation overhead GPU needs 1000s of threads for full efficiency Multi-core CPU needs only a few
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8 L2 FB SP SP L1 TF Thread Processor Vtx Thread Issue Setup / Rstr / ZCull Geom Thread Issue Pixel Thread Issue Input Assembler Host SP SP L1 TF SP SP L1 TF SP SP L1 TF SP SP L1 TF SP SP L1 TF SP SP L1 TF SP SP L1 TF L2 FB L2 FB L2 FB L2 FB L2 FB The future of GPUs is programmable processing So – build the architecture around the processor G80 Graphics Mode
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9 G80 CUDA mode A Device Example Processors execute computing threads New operating mode/HW interface for computing Load/store Global Memory Thread Execution Manager Input Assembler Host Texture Texture Texture Texture Texture Texture Texture Texture Parallel Data Cache Parallel Data Cache Parallel Data Cache Parallel Data Cache Parallel Data Cache Parallel Data Cache Parallel Data Cache Parallel Data Cache Load/store Load/store Load/store Load/store Load/store
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10 Extended C Type Qualifiers global, device, shared, local, constant Keywords threadIdx, blockIdx Intrinsics __syncthreads Runtime API
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13.1-gpus-3 - CS6230 HPC Tools and Applications...

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