6 - CSE140: Components and Design Techniques for Digital...

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Sources: TSR, Katz, Boriello, Vahid, Perkowski 1 CSE140: Components and Design Techniques for Digital Systems Tajana Simunic Rosing
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Sources: TSR, Katz, Boriello, Vahid, Perkowski 2 Today HW#6 due, HW#7 out Midterm #2 on Thursday – Chapters 1-8, App. A-C – Ok to bring one 8 ½” x 11” handwritten sheet of notes, pencil and eraser; nothing else Design examples
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Sources: TSR, Katz, Boriello, Vahid, Perkowski 3 CSE140: Components and Design Techniques for Digital Systems Design examples Tajana Simunic Rosing
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Sources: TSR, Katz, Boriello, Vahid, Perkowski FSM design example: counter Design a three bit up/down counter with two inputs: count enable (C, where C=1 starts counting) and count direction (D). When D=1 count up, else count down in increments of two. 4
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Sources: TSR, Katz, Boriello, Vahid, Perkowski Analysis example Write the state table and next state equations for the following: 5
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Sources: TSR, Katz, Boriello, Vahid, Perkowski 6 Finite string pattern recognizer: Next state & Output logic
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Sources: TSR, Katz, Boriello, Vahid, Perkowski FSM Design Example Write the state table and implement the following state machine with T-FFs: 7
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Sources: TSR, Katz, Boriello, Vahid, Perkowski Example of state minimization CS NS x=0 NS x=1 Output 0 1 2 3 4 5 6 7
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Sources: TSR, Katz, Boriello, Vahid, Perkowski Example: state assignment CS NS x=0 NS x=1 0 1 2 3 4 5
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Sources: TSR, Katz, Boriello, Vahid, Perkowski T pd = 50ns; T gate =25ns T h < T pd_min + T comb_min – T skew_max T clk > T pd_max + T comb_max + T su + T skew_max
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This note was uploaded on 11/10/2010 for the course CSE 140 taught by Professor Rosing during the Spring '06 term at UCSD.

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6 - CSE140: Components and Design Techniques for Digital...

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