21.CMOS_highk - 1 3 major concerns for digital CMOS L...

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1 3 major concerns for digital CMOS 3 major concerns for digital CMOS 1. Increasing I ON via mobility improvement 2. Reducing gate leakage via thicker, high- k dielectrics 3. Controlling V T and I subt via suppression of the short-channel effect • L cannot be further reduced without adversely affecting V T 0 and I subt • TOX cannot be further reduced without causing excessive gate leakage current • Some other way needs to be found to increase I ON Remedies for CMOS45: 1,3 started at CMOS90 2 is new to CMOS45
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2 High-k dielectrics • High C OX needed for I D and S In ON condition, higher C ox means more channel charge, therefore more current Over the years, higher C ox has been achieved by reducing t ox . What is t ox now?
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High-k dielectrics • High C OX needed for I D and S In the sub-threshold regime, higher C ox also means more electron charge, and this is bad. It also means a steeper inverse sub-threshold slope. This is good.
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This note was uploaded on 11/10/2010 for the course EECE 480 taught by Professor David during the Fall '09 term at The University of British Columbia.

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21.CMOS_highk - 1 3 major concerns for digital CMOS L...

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