01_Intro

01_Intro - EE 471: Computer Design and Organization...

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EE 471: Computer Design and Organization Professor Scott Hauck, 307Q, hauck@ee.washington.edu Office hours: email w/schedule TA: Nate McVicar (nmcvicar@u.washington.edu) Oluwafemi Temitope (oluwafemit@gmail.com) Office hours: (EEB-361/371) up-to-date times on website 1 Book: Patterson, Hennessy, Computer Organization and Design: The Hardware/Software Interface , Fourth Edition, 2009, Morgan Kaufmann . Grading (approximate): 15% - Homeworks 40% - Design Project 20% - Midterm 25% - Final Exam Prerequisites Basic Logic Design and Boolean Algebra AND, OR, NAND, NOR gates Boolean Algebra Karnaugh Maps D Flip-flops, registers, and Memories Binary numbers, 2’s complement, negation, overflows Verilog C/Java programming 2 If you don’t know this material, DO NOT TAKE THE CLASS If you don’t remember this material, REVIEW NOW .
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Joint Work Policy The processor design and homeworks will be done in groups of 1-2. Students may not collaborate between groups on the specifics of homework
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01_Intro - EE 471: Computer Design and Organization...

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