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Unformatted text preview: Propagation delay of 100ps Contamination delay of 55ps a. If there is no clock skew, what is the maximum operating frequency of this circuit? b. How much clock skew can the circuit tolerate before it might experience a hold time violation? c. Redesign the circuit so that it can be operated at 3GHz frequency. How much clock skew can your circuit tolerate before it might experience a hold time violation? 5. (Decoders and Multiplexers) Given a three-input Boolean function f(a; b; c) = ∑m(0, 1, 2, 3, 7). a. Implement the function using a minimal network of 2:4 decoders and OR gates. b. Implement the function using a minimal network of 4:1 multiplexers. c. Implement the function using a minimal network of 2:1 multiplexers....
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This note was uploaded on 11/11/2010 for the course CSE 140 taught by Professor Rosing during the Fall '06 term at UCSD.
- Fall '06