hw1 - CSE 260 Digital Computers Organization and Logical...

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Unformatted text preview: CSE 260 Digital Computers: Organization and Logical Design Homework 1 Jon Turner 1. The diagram below shows the contents of the washu-1 processor's registers and memory. Show how the registers and memory change if the processor executes three instructions, starting from this state. Processor IREG PC ACC IAR Memory 03A1 03A2 03A3 03A4 03A5 03A6 03A7 03A8 03A9 03AA FFFF 0012 12C5 A3A1 53AA 852E 2314 37BC BD89 03a2 123C 03A4 213D 3215 -1- 2. (This problem can be done in groups of 2 or 3. Work together.) The program below continuously modifies the display buffer in the washu-1. Use the buttons and switches on the S3 board to enter this program into memory and then connect the S3 board to a computer monitor and observe the changing pattern. Now, come up with your own modification to the program and see how this changes the display. Turn in a copy of your program. We'll have a demo session at the start of the next class, and a vote for the coolest program. addr 0000 0001 0002 0003 0004 0005 0006 0007 0008 0009 000a 000b 000c 000d 000e 000f 0010 0011 0012 inst 2010 9004 2011 4010 3010 a010 5010 1400 700b a012 6008 1001 a010 4010 6000 0000 0000 f000 ffff --------------------comment loop: if p >= 0, p = xF000 M[p] = M[p] + p delay loop - 1024 iterations p = p + 1 goto loop unused pointer, p starting address of display buffer constant -1 -2- ...
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This note was uploaded on 11/12/2010 for the course KTMT KTMT04 taught by Professor Son during the Spring '10 term at Dallas Colleges.

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hw1 - CSE 260 Digital Computers Organization and Logical...

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