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# hw3a - output of the NAND gate Explain why What if the 2...

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- 1 - 1. (10 points) Show that the exclusive-or function is associative. That is, A ( B C ) = ( A B ) C. You can do this using a truth table. Based on this, give a circuit using 2 input xor gates that computes the odd function on eight inputs. If each xor gate is implemented using NAND gates (as shown on page 3-8 of the lecture notes), what is the worst-case delay for your circuit, assuming each NAND has a delay of 1 ns? 2. (10 points) Consider a CMOS inverter that drives one other gate and assume that the propagation delay for a high-to-low transition at the inverter output is 1 ns. Now suppose we replace the inverter with a 2 input NAND gate constructed using transistors that are the same as those used in the inverter. What is the time for a high-to-low transition at the
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Unformatted text preview: output of the NAND gate? Explain why. What if the 2 input NAND is replaced with a three input NAND? 3. (10 points) Consider a circuit with 12 inputs and a single output. What is the minimum number of LUTs that would be required to implement this circuit? Give an example of a 12 input circuit that could be implemented with this number of LUTs. Give a circuit using LUTs that implements the expression shown below. Uses as few LUTs as you can. How does the number of LUTs compare to the minimum number required for a 12 input function. ( A + B + C + D + E )( F + G + H + I + J )( K + L ) CSE 260 – Digital Computers: Organization and Logical Design Homework 6 Jon Turner Due 2/5/2008...
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