- 1 - 1.(15 points) Write a VHDL module that implements a serial in-rangecircuit. This is a circuit that determines if an input value xis numerically in between two other input values aand b. All three of the data inputs are input to the circuit one bit at a time with the most-significant-bit first. The circuit has a single output value called inRangewhich should be high, if the portion of xthat has been seen so far is numerically in between the portion of aand bthat has been seen so far. Note that amay be less than, greater than or equal to b. So for example, if the stream of input bits for ais 1001 0101 (with most significant bit first), bis 1000 0101 and xis 1001 0110 then inRangewill be 1111 1100. Your circuit should also have a resetinput and when reset is high, inRangeshould be low. The first output bit should appear just after the first rising clock edge after resetdrops, with subsequent bits on every
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