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Unformatted text preview: that gate delays for simple gates can range from .4 ns to 1.5 ns, that gates with 3 or 4 inputs have twice as much delay as simple gates, that the flip flop propagation delay can range from 1 ns to 4 ns and that the clock skew is 1 ns.  3  3. (10 points ) Consider a synchronizer used to synchronize an asynchronous input signal. Let the average time between changes of the input signal be 50 microseconds. Let the flip flop parameters be T = 3 ns and τ = 2 ns. If the clock period for the synchronizer is 10 ns, what is the mean time between synchronizer failures? What is the smallest clock period (to the nearest ns) for which the mean time between failures is 10 years? What is the smallest clock period for which the mean time between failures is 10,000 years?...
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 Spring '10
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 Logic gate, Metastability in electronics

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