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Unformatted text preview: - 1 - 1. (20 points) Show how you would modify the VHDL for the vgaDisplay module, if you had a larger memory available. Specifically, assume that you can implement a memory array that has 80,000 words of 4 bits each. This is large enough to hold 320x240 pixels, which is large enough for a half resolution VGA display (the normal VGA display resolution is 640x480). The modifications are highlighted in bold. Note the address type must be modified so that an address is 17 bits long rather than 14. entity vgaDisplay is port ( clk, reset: in std_logic; -- signals for writing display buffer we: in std_logic; inAddr: in address; inData: in word; -- output signals for driving VGA display hSync, vSync: out std_logic; dispVal: out word); end vgaDisplay; architecture arch of vgaDisplay is constant dbSize: integer := 80000; -- number of words in memory type dbType is array(0 to dbSize-1) of word; signal dBuf: dbType := ( -- assign initial values to simplify testing 0 to 9599 => x"7", 9600 to 19199 => x"0",..., others => x"7"); 19199 => x"0",....
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- Spring '10
- Pixel, Display resolution, vga display, CLOCK TICKS, hState, buffer signal addr