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Unformatted text preview: using 5 block RAMs. You may use more than one distinct configuration, but make sure that you label each block RAM you use and show how the address and data lines of the different block RAMs are connected to implement the overall memory. Assume that each block RAM has an enable input, a read/write input, a data input and a data output. You may assume that the data outputs have internal tristate buffers that are turned off when the enable input is low. If you need to use any external decoders, make sure that you show how they connect to the address inputs and the address lines of the individual block RAMs. CSE 260 Digital Computers: Organization and Logical Design Homework 10 Jon Turner Due 4/8/2008...
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This note was uploaded on 11/12/2010 for the course KTMT KTMT04 taught by Professor Son during the Spring '10 term at Dallas Colleges.
- Spring '10