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Unformatted text preview: - 1 - 1. (10 points) Consider a 32Kx32 SRAM (K means 1024). How many address bits does this memory require? Assuming that the central memory array has the same number of rows as it has columns, how many rows are there? How many of the address bits are used by the row decoder? How many by the column decoder? In what row and what column of the memory would you find bit 2 of the word with address 54d2? Assume that the row decoder uses the high order address bits and that the column decoder uses the low order address bits. The memory will store 32K=2 15 words, so 15 address bits are needed. The memory stores a total of 1 Mbits or 2 20 bits, so it will have 2 10 =1024 rows and 1024 columns. This means that 10 of the 15 address bits will be used by the row decoder to select one of the 2048 rows and that the remaining 5 bits will be used by the column decoder. The memory stores 32 bit words, so each row contains 32 words. Since the row decoder uses the top 10 bits of the address, the word with address 54d2=101 words....
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- Spring '10