hw11 - CSE 260 Digital Computers: Organization and Logical...

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
- 1 - 1. (10 points) Consider the program on page 9-11 and 9-12 of the lecture notes. Suppose the WashU-1 processor is augmented with a direct-mapped instruction cache with 16 words. Each cache word includes a tag, consisting of the upper 12 bits of the stored instruction’s address, and the instruction itself. Assume that all words in the cache are zero at the time the program starts execution. Show the contents of the cache just after the instruction at location 0004 is executed for the first time. Show the contents of the cache the second time that the instruction at location 0004 is executed. Show the contents of the cache the third time that the instruction at location 0004 is executed. Suppose that an instruction fetch takes 4 clock cycles for instructions that are present in the cache, but 20 clock cycles for instructions that are not in the cache. How much time is spent on instruction fetches during the first execution of the loop? How much time is spent on instruction fetches during the second execution of the loop? Explain your answers.
Background image of page 1
This is the end of the preview. Sign up to access the rest of the document.
Ask a homework question - tutors are online