hw11Sol - CSE 260 Digital Computers: Organization and...

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- 1 - 1. (10 points) Consider the program on page 9-11 and 9-12 of the lecture notes. Suppose the WashU-1 processor is augmented with a direct-mapped instruction cache with 16 words. Each cache word includes a tag, consisting of the upper 12 bits of the stored instruction’s address, and the instruction itself. Assume that all words in the cache are zero at the time the program starts execution. Show the contents of the cache just after the instruction at location 0004 is executed for the first time. Show the contents of the cache the second time that the instruction at location 0004 is executed. Show the contents of the cache the third time that the instruction at location 0004 is executed. The cache contents are shown below, right after the instruction at location 0004 is executed. tag instr . tag instr . tag instr . 0 000 1000 0 001 1001 0 001 1001 1 000 41ff 1 001 a1fd 1 001 a1fd 2 000 1200 2 001 41fd 2 001 41fd 3 000 41fd 3 001 6004 3 001 6004 4 000 1dfb 4 000 1dfb 4 000 1dfb 5 000 0000 5 000 a1fd 5 000 a1fd 6 000 0000 6 000 7014 6 000 7014 7 000 0000 7 000 100a 7 000 100a 8 000 0000 8 000 c1ff 8 000 c1ff 9
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hw11Sol - CSE 260 Digital Computers: Organization and...

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