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hwc - CS/EE/CoE 260 Homework 12 Due 1 Suppose we want to...

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CS/EE/CoE 260 - Homework 12 Due 12/9/2002 1. Suppose we want to implement the following logic equations. X = AB’ + C(B+D) Y = (A’ + B)(AC + C’D) Z = A B + CD’ ( a ) If these equations are implemented with a PROM, how many words must the PROM have and how many bits per word must it have? ( b ) If these equations are implemented with a PLA, how many product terms must it have? (c) If the equations are implemented with a PAL, how many product terms must it have? 2. Show how the sequential circuit shown below can be mapped onto a single configurable logic block. Do this by specifying the functions that the LUTs implement and showing the paths through the multiplexers that must be configured to provide the required connections (show this by drawing heavy lines on a photocopy of page 6-21 of the notes). Also show what values must be stored in each location of the LUTs to implement the required logic functions. D >C Q D >C Q A B X Y Clk U V - 1 -
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3. A 32K × 8 SRAM chip is shown, below. Using this chip, design a memory system that has a total of 128 KB of memory and a memory width of 16 bits.
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