hwc - CS/EE/CoE 260 - Homework 12 Due 12/9/2002 1. Suppose...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
Due 12/9/2002 1. Suppose we want to implement the following logic equations. X = AB’ + C(B+D) Y = (A’ + B)(AC + C’D) Z = A B + CD’ ( a ) If these equations are implemented with a PROM, how many words must the PROM have and how many bits per word must it have? ( b ) If these equations are implemented with a PLA, how many product terms must it have? (c) If the equations are implemented with a PAL, how many product terms must it have? 2. Show how the sequential circuit shown below can be mapped onto a single configurable logic block. Do this by specifying the functions that the LUTs implement and showing the paths through the multiplexers that must be configured to provide the required connections (show this by drawing heavy lines on a photocopy of page 6-21 of the notes). Also show what values must be stored in each location of the LUTs to implement the required logic functions. D
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 11/12/2010 for the course KTMT KTMT04 taught by Professor Son during the Spring '10 term at Dallas Colleges.

Page1 / 3

hwc - CS/EE/CoE 260 - Homework 12 Due 12/9/2002 1. Suppose...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online