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Unformatted text preview: 74x49, and the logic as implemented by the circuit diagram given in class for segments a, b, c, d, e, f, and g. 2. Write a VHDL program for the state machine described in Problem 7.44. Note that you should use the state diagram given in the solution for Problem 1 of Homework #3. 3. Problem 8.40 (write VHDL program only)....
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This note was uploaded on 11/15/2010 for the course ECE 561 taught by Professor Orin,d during the Spring '08 term at Ohio State.
- Spring '08