Lecture4_7Updated-04052010

# Lecture4_7Updated-04052010 - Analysis of More Realistic...

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nalysis of More Realistic Analysis of More Realistic Example Read: 6.4.1-3, 7.8, 8.4.1-4, 8.5.1-5, 8.7.1

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Can you tell what this circuit is doing?
SYSCNT

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Hints • Sequential two’s complement machine nalyze a machine that takes the 2’s – Analyze a machine that takes the 2s complement of an 8-bit number bits in START - 8 bits out DONE 8 bits in, START > 8 bits out, DONE – More realistic example that uses MSI chips or PLDs FPGAs design we usually use – For PLDs, FPGAs design, we usually use functional blocks (LBB – Logic Building lock) equivalent to the counters, shift Block) equivalent to the counters, shift registers, decoders, etc
eneral architecture and operation General architecture and operation Example: 01001010 -> 10110110 01001010 -> 11111111+1 – 01001010 = 10110101 + 1 = 10110110 – Write down bits from right until a 1 is encountered. Complements all bits there after eneral Operation Flow General Operation Flow – Load 8 bits into 2 74194 (4 bit shift right/left register) – Do a circular shift on the data, inverting bits as necessary Finally, the 2’s complement data will appear at the output after 8 shift operations Parallel Data Out Invert vertQ Q 7 Q 6 Q 5 Q 4 Q 3 Q 2 Q 1 Q 0 InvertQ -------- 0 0 1 0 0 1 0 1 0 0 1 0 0 1 0 0 1 0 1 0 10010010 1 2 1 0 0 1 0 0 1 0 1 3 1 1 0 0 1 0 0 1 1 4 0 1 1 0 0 1 0 0 1 5 1 0 1 1 0 0 1 0 1 11011001 1 6 1 1 0 1 1 0 0 1 7 0 1 1 0 1 1 0 0 1 8 1 0 1 1 0 1 1 0 1

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eneral architecture and operation General architecture and operation 4LS194 (4 bit shift register) is used for loading & shifting 8 bit 74LS194 (4 bit shift register) is used for loading & shifting 8 bit data • We use D f/f (with asynchronous clear) to remember from when t i i inverting is necessary • We use 74LS163 (a synchronous 4-bit counter) to count 8 shifts he system controller determines when data should be loaded, The system controller determines when data should be loaded, shifted or held by controlling S1 and S0 • The system controller also looks at BITFLG so as to know when set the INVERT D f/f
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Lecture4_7Updated-04052010 - Analysis of More Realistic...

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