Lecture16Updated-05102010

Lecture16Updated-05102010 - Binary Serial Adder Iterative...

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inary Serial Adder Iterative Binary Serial Adder, Iterative Circuits, Adders ead: 6.10.1 .10.5, 8.6 Read: 6.10.1 6.10.5, 8.6
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1-bit Full Adder and 4-bit Ripple Adder
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Design a Binary Serial Adder • Develop a circuit which can take one bit from each of A d B and combine them with the previous carry and and B and combine them with the previous carry and generate a S (sum) and new carry Ai CLR HOLD CLR – clear the previous carry synchronously HOLD – hold the previous value of the carry Bi Si
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Step 1: State Diagram/Table Format: CLR HOLD A B / S 1xxx/x, 01xx/x, 0000/0, 0001/1, 0011/0 01xx/x, 0001/0, 0010/0, 0011/1 0 1 ,, 0010/1 1xxx/x, 0000/1
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t 4 T iti O t t T bl Step 4-6: Transition Output Table,
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This note was uploaded on 11/15/2010 for the course ECE 561 taught by Professor Orin,d during the Spring '08 term at Ohio State.

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Lecture16Updated-05102010 - Binary Serial Adder Iterative...

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