Lecture20_23Updated-05132010

Lecture20_23Updated-05132010 - CPLD FPGA CPLD, FPGA Read:...

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PLD FPGA CPLD, FPGA ead: 8.3, 9.5, 9.6 Read: 8.3, 9.5, 9.6
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Modern Design Method • Using CAD tools (like Xilinx) and programmable gic devices logic devices – Along with RAMs and ROMs omplex Programmable Logic Devices (CPLDs) – Complex Programmable Logic Devices (CPLDs) – Field Programmable Logic Devices (FPGAs) ilinx XC9500 CPLD and XC4000 FPGA family • Xilinx XC9500 CPLD and XC4000 FPGA family – Can program wide range of combinational circuits an program wide range of sequential circuits Can program wide range of sequential circuits – CAD tool automatically do (fit, place and route) from our high level specification
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PLD (Programmable Logic Device) (8.3) AL16LV8R page 704) (GAL16LV8R, page 704) How to implement the following? 1 2 1 2 1 2 1 1 Q Q Z Q Q X Q D Y Q Q X Q D 2 1
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GAL22V10 page 705
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eneral CPLD Architecture General CPLD Architecture •P L D r o grammable Interconnect g I/O block
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ilinx 9500 amily Architecture Xilinx 9500-Family Architecture
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Function Block
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O Block I/O Block
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Switch Matrix From From 72 Macrocell outputs 69 External inputs 36 To FB1 AND array Programmable Switch 36 36 To FB2 AND array Matrix 36 To FB3 AND array To FB4 AND array
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rogrammable Elements Programmable Elements • Many elements should be correctly programmed –FB s rogrammable AND array • Programmable AND array • Product term allocator • Programmable Mux in macrocells – I/O Blocks
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Lecture20_23Updated-05132010 - CPLD FPGA CPLD, FPGA Read:...

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