Unformatted text preview: components, four T2 components and two T3 components. What is the system failure rate? 3. In which FPGA design phase are circuit components assigned to virtual LUTs? 4. What is the largest one-hot encoded FSM that could be put into a SPARTAN XCS20 FPGA?...
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- Spring '10
- Failure rate, Annualized failure rate, LUTs, FPGA design phase, single port RAM, SPARTAN FPGA