Lec-11-FPGAs - Evolution of Im m ntation Te ple e chnologie...

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Xilinx FPGAs - 1 trend toward higher levels of integration Evolution of Implementation Technologies Discrete devices: relays, transistors (1940s-50s) Discrete logic gates (1950s-60s) Integrated circuits (1960s-70s) e.g. TTL packages: Data Book for 100’s of different parts Map your circuit to the Data Book parts Gate Arrays (IBM 1970s) “Custom” integrated circuit chips Design using a library (like TTL) Transistors are already on the chip Place and route software puts the chip together automatically + Large circuits on a chip Automatic design tools (no tedious custom layout) - Only good if you want 1000’s of parts
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Xilinx FPGAs - 2 Gate Array Technology (IBM - 1970s) Simple logic gates Use transistors to and sequential logic Interconnect Wires to connect inputs and outputs to logic blocks I/O blocks Special blocks at periphery for external connections Add wires to make connections Done when chip is fabbed “mask-programmable” Construct any circuit
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Xilinx FPGAs - 3 Programmable Logic Disadvantages of the Data Book method Constrained to parts in the Data Book Parts are necessarily small and standard Need to stock many different parts Programmable logic Use a single chip (or a small number of chips) Program it for the circuit you want No reason for the circuit to be small
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Xilinx FPGAs - 4 Programmable Logic Technologies Fuse and anti-fuse Fuse makes or breaks link between two wires Typical connections are 50-300 ohm One-time programmable (testing before programming?) Very high density EPROM and EEPROM High power consumption Typical connections are 2K-4K ohm Fairly high density RAM-based Memory bit controls a switch that connects/disconnects two wires Typical connections are .5K-1K ohm Can be programmed and re-programmed in the circuit Low density
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Xilinx FPGAs - 5 Programmable Logic Program a connection Connect two wires Set a bit to 0 or 1 Regular structures for two-level logic (1960s-70s) All rely on two-level logic minimization PROM connections - permanent EPROM connections - erase with UV light EEPROM connections - erase electrically PROMs Program connections in the _____________ plane PLAs Program the connections in the ____________ plane PALs
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Xilinx FPGAs - 6 Making Large Programmable Logic Circuits Alternative 1 : “CPLD” Put a lot of PLDS on a chip Add wires between them whose connections can be programmed Use fuse/EEPROM technology Alternative 2: “FPGA” Emulate gate array technology Hence Field Programmable Gate Array You need: A way to implement logic gates A way to connect them together
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Xilinx FPGAs - 7 Field-Programmable Gate Arrays PALs, PLAs = 10 - 100 Gate Equivalents Field Programmable Gate Arrays = FPGAs Altera MAX Family Actel Programmable Gate Array Xilinx Logical Cell Array 100 - 1000(s) of Gate Equivalents!
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Xilinx FPGAs - 8
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This note was uploaded on 11/18/2010 for the course ECE 12345 taught by Professor Garrisongreenwood during the Spring '10 term at Pohang University of Science and Technology.

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Lec-11-FPGAs - Evolution of Im m ntation Te ple e chnologie...

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