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# homework2 - function is described below(a Design a...

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Computer-aided IC Design/VLSI I Spring 2010 (Prof. David Pan) Homework #2: Assigned Feb. 3, due Feb 10 in class * is for graduate student only 1. Realize the following functions using CMOS technology with the minimum possible number of transistors (' is used to denote complementation). (a) F = (((a + b) . c) + d)' (b) F = (a + b).(a + c) (c) F = a.b + a'.c + b.c.d (d) F = ((a + b + c).d.e)' 2. Problem 2.4 from the Exercises for Chapter 2. 3. Problem 2.10 from the Exercises for Chapter 2. 4. Problem 2.14 from the Exercises for Chapter 2. 5. Problem 2.21 from the Exercises for Chapter 2. 6. Problem 2.22 from the Exercises for Chapter 2. *7. This problem relates to the design of priority functions in CMOS. The 4-input priority

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Unformatted text preview: function is described below: (a) Design a gate-level implementation of the 4-input priority function. (b) Design the transistor level implementation of the above function. The above implementation cannot be readily expanded in a natural way to implement a function with more inputs. Another solution to the realization of the priority function for N inputs would be to repeat a single variable cell N times. Appropriate information is transmitted between cells as shown in the figure below: (c) Design a cell in CMOS technology at the transistor level which, when repeated as above, implements the priority function....
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## This note was uploaded on 11/21/2010 for the course EE 360R taught by Professor Pan during the Spring '10 term at University of Texas.

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homework2 - function is described below(a Design a...

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