This preview shows page 1. Sign up to view the full content.
Unformatted text preview: (shown below): an adder macro (adds numbers of a specified bit-width) which produces an adder with a delay of 100 pS/bit, and a multiplexer (which selects from inputs of specified bit width) which has a delay of 100 pS (independent of the size). The arrival times of the input signals to the circuit are also shown below. Design the circuits for the following specifications, and show the interconnection of the modules below to meet the specs. Make sure that the you show the appropriate bits for the inputs to the modules. (You may not need to use all the modules for a solution, or you may need to add additional modules. Do NOT add any other logic other than the two modules.) (a) Design a circuit to complete the addition in <= 3 nS. (b) Design a circuit to complete the addition in <= 2 nS....
View Full Document
- Spring '10