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Unformatted text preview: 1 VLSI Design J. Abraham Spring 2006 EXAM. I March 1, 2006 Name: Student, A Open Book, Open Notes. Time Limit: 75 minutes (pace yourself). Check for 5 pages in exam. Write all your answers in the spaces/boxes provided. Show any calculations in these pages using the back of the pages if needed. State clearly any assumptions made. PROBLEM MAX POINTS 1 15 2 20 3 20 4 25 5 20 TOTAL 100 1. (15 points) Size the transistors in the circuit below so that it has the same drive strength, in the worst case, as an inverter that has PW = 3 and NW = 2. Use the smallest widths possible to achieve this ratio. Write down the size next to each transistor. b a c d d b a c 2 2. (20 points) Find the voltages at each of the nodes, A, B, C, D, E and F below. Use the following circuit parameters: V dd = 5 V , V tn = 0 . 5 V ,  V tp  = 1 . 5 V . A B C F E D Vdd Vdd Vdd Vdd A = B = C = D = E = F = 3 3. (20 points) Use the Elmore delay approximation to find the worstcase fall delay at output F for the following circuit. The gate sizes of the transistors are shown in the figure.for the following circuit....
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This note was uploaded on 11/21/2010 for the course EE 360R taught by Professor Pan during the Spring '10 term at University of Texas.
 Spring '10
 PAN

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