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syllabus - Syllabus for EE 316 Digital Logic Design Course...

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Syllabus for EE 316 - Digital Logic Design Course: EE316 – Digital Logic Design Term: Fall 2010 Lecture: TuTh 2:00-3:30pm in NOI 1.124 Unique No.: 16210 Instructor: Prof. Nur A. Touba Office: ACES 6.132 Phone: 232-1456 Email: [email protected] Office Hours: TuTh 1:00-2:00pm in ACES 6.132 or by appointment Lab: ENS 202 (316 Lab) Lab Hours: TBA Description: This course teaches the principles of digital logic design and includes a lab component. The topics covered include the following: Boolean Algebra Karnaugh Maps Analysis and Design of Combinational Logic Latches, Flip-Flops, Registers, Counters Multiplexers, Decoders, and Programmable Logic Devices Analysis and Design of Sequential Circuits Introduction to VHDL Applications to Computer Design Prerequisite: EE 306 or CS 307; and credit or registration for EE 312 or CS 310. Required Textbook: Fundamentals of Logic Design , by C.H. Roth and L.L. Kinney, Cengage Learning, Sixth Edition, ISBN 0-495-47169-0.
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