FinalExamFall05Solution

FinalExamFall05Solution - EEL 3701 — Introduction ip...

Info iconThis preview shows pages 1–8. Sign up to view the full content.

View Full Document Right Arrow Icon
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 2
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 4
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 6
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 8
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: EEL 3701 — Introduction ip Digital Design Final Exam — Fall Semestéf 2005 Name: 2. Answer the following for the given next-state truth (logic) table. Y and Z are outputs and X I: is the only input. (14 ms» co nunnnn Y: (1 pt.) Manet—lam z: (1 pt.) agmolr‘lzbnox Cg \C.“ ' QL’V 01+ w EEL 3701 — Introductioé'r'i‘jto Digital Design Final Exam — Fall Semester 2005 Name: 2. (continue) ‘ Design a circuit to implement the truth table from the previous page. 0 Use only a ROM and D—FF‘s. Use m other SSI, MSI or LSl elements. 0 The signals X and Y are active-high and Z is active-low. - Use as little of the EEPROM as possible. List the ROM contents in order stating at address 0 (b) Complete the following circuit by drawing in the appropriate-number of D-FF's and show connections to §_l_l EEPROM signals. (4 pts.) M (0) List the ROM contents in order stating at address 0, wi ' d data specified in HEX. Program Zeros for “Don't Cares" (8 pts.) ‘/2 WA @042“ EEL 3701 — intrcciuctich‘ftc Digital Design “5‘1”; Final Exam — Fall Semester 2005 Name: 3.'Hand Assembly & Program Analysis (Use the G-CPU information in the appendix) C1 Assume that you are given an 8Kx8 EPROM that has been erased completely. i.e. all memory contents are now $FF. (14 pts') Hand Assemble the following G-CPU program and show the contents of EPROM memory WNA 7/ (Address & Data) that has been modified after the EPROM is programmed: ORG $0080 A '~ B X T1 dc.b $45 000 l 000 T2 dc.b $88 38 HOOOi O l T3 dc.b °/o1010fl101 M) W ORG $0 . M LDAA c "D LDAB _ vi Nest [code/(T bate, fists-i OR_BA , LDX #$0180 Cub (fled Aelaém. TOP _ STAA $12,x (Ewes/91 TOP Addrngex) DatagHex) Addr Hex DatalHex) befi‘ "so 0000 Oil: c9001 08 goat ~ 5 good 8’ 80 coo fl 'Addr (Hex) ’t’ ‘ <90 80 +5 17. 008i 8'8 (g 00 82 0\ —._.______———— STAA SH», k 05 7"? 000A \0 3E2 00.0 8 i2 EN TOP _'.—_ i... ________ ____ i 673' '55“- 3 (b) In the above program that: is the effective address associated with the 0(de ‘ instruction? - J} * 3: @08‘0 Hex C, P: r‘) W OTC K (c) What is the effective address associated with the" LDX #$0180” instruction? {pang WC (cl) What is the effective address associated with the instruction? STM $61 X . it, ' §Oi32c - Hex owe-econ, 4? c? Hex ' \ 1(e) What is the value of the A register the first time is executed? Will the $1'AA $12, X branch occur? ' ~ A Register Contents = CD Hex Branch will occur (circle one)? @,or F 5 r /'. EEL 3701 —- Introduction Digital Design Final Exam — Fall Semester 2005 Name: 4.' Program Execution (Use the G-CPU information in the appendix) [:1 Given the following program in EPROM memory, fill out the cycle table that follows: (18 pts.) Meir 993 (1) 32 mm m #131 g —06 4 3:: W 5w Jim Using the the G-CPU Controller ASM & Block Diagram (Appendix A handouts), complete the cycle table below: A17 ~90 AIS’AVO” I IQA’M_CZ¢ EEL 3701 — lntroductiori'to Digital Design Final Exam — Fall Semester 2005' Name: 6. GCPU Assembly Programming (Use the G-CPU instruction set in Appendix A) ‘ ‘ Given the following constants in EPROM and SRAM Memory, write a program to fi|| the first (12 pts ) 128 memory locations in SRAM with zeros. Assumptions: 1. EPROM exists in the memory map from O-FFF Hex. 2. SRAM exists in the memory map from 1000-1FFF Hex. 3. Your program should begin at address 0 in EPROM. 4. Write a program to zero out (clear) the first 128 locations in SRAM. Mg fa LDX #$1000 ;ptr to-SRAM LDAB #128 ;loop counter Top LDAA #0 STAA O,X ;clear location INX ;inc ptr LDAA #$FF ;decrement by SUM_BA ;adding —1 BBQ Done ;test loop counter TAB BNE Top Done w , ...
View Full Document

Page1 / 8

FinalExamFall05Solution - EEL 3701 — Introduction ip...

This preview shows document pages 1 - 8. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online