Assignment05Fall2010Solution

Assignment05Fall2010Solution - 525.412 Computer...

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Unformatted text preview: 525.412 Computer Architecture Assignment 5 Solutions 5.3 Use a sheet similar to Figure 5.7 of the text to trace the code fragment given on page 191 through the pipeline. Assume the following decimal reg- ister and memory values: r1 = 1, r2 =- 4, r3 = 32, r5 = 8, addr1 = 1000, addr2 = 2000, PC = 100, M[2000] = 100. Insert nop bubbles into the pipeline as needed to resolve any dependences. Solution The program on p. 191 is given below. The first instruction is located at address 100 so that the PC is already pointing to it. # Address Instruction Comments 1 100 shr r3,r3,2 ;Storing result into r3 2 104 sub r2,r5,r1 ;Idleno memory access needed 3 108 add r4,r3,r2 ;Performing addition in ALU 4 112 st r4,addr1 ;Accessing r4 and addr1 5 116 ld r2,addr2 ;Fetching instruction There are dependencies between various instructions. Instruction 3 de- pends on instructions 1 and 2. Instruction 4 depends on 3. Instruction 5 depends on 2. The contents of the program counter, PC, are not provided but let us assume PC contains the value 100 initially so that this program fragment will be fetched and executed. When the shr instruction reaches stage 3, the value 32 10 = 0100000 2 is shifted 2 bits to the right. Assume that there is a barrel shifter in this ALU, unlike the earlier design which could only shift a word one bit at a time. After shifting, the ALU will output the value 0001000 2 = 8 10 . 1 Instruction Memory INC4 PC2 A1 R1 A2 R2 A3 R3 Branch Logic Cond Decode ALU Data Memory Decode rb rc ra c2 c1 c2<2..0> ra op Decode ra op PC I2 I3 I4 I5 op ra MD5 MD4 Z4 MD3 MP5 Load/Store X3 Y3 MP4 MP3 Opn 1. Instr Fetch 2. Decode Oprd Read 3. ALU Opn 5. ra Write value MP1 MP2 Reg File Instruction Memory INC4 PC2 A1 R1 A2 R2 A3 R3 Branch Logic Cond Decode ALU Data Memory Decode rb rc ra c2 c1 c2<2..0> ra op Decode ra op PC I2 I3 I4 I5 op ra MD5 MD4 Z4 MD3 MP5 Load/Store X3 Y3 MP4 MP3 Opn 1. Instr Fetch 2. Decode Oprd Read 3. ALU Opn 5. ra Write value MP1 MP2 Reg File Instruction Memory INC4 PC2 A1 R1 A2 R2 A3 R3 Branch Logic Cond Decode ALU Data Memory Decode rb rc ra c2 c1 c2<2..0> ra op Decode ra op PC I2 I3 I4 I5 op ra MD5 MD4 Z4 MD3 MP5 Load/Store X3 Y3 MP4 MP3 Opn 1....
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Assignment05Fall2010Solution - 525.412 Computer...

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