Assignment09Fall2010Assignment

Assignment09Fall2010Assignment - indicated a speedup of...

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525.412 Computer Architecture Assignment 9 7.18 In the memory module interleaving scheme of Table 7.5, a speciFc system is to be delivered with six memory modules of 2 28 words each. What is the maximum amount of interleaving that can be used in this system? 7.19 A certain two-way set associative cache has an access time of 4 ns, com- pared to a miss time of 60 ns. Without the cache, main memory access time was 50 ns. Running a set of benchmarks with and without the cache
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Unformatted text preview: indicated a speedup of 90%. What is the approximate hit ratio? 7.20 A 128 MB main memory has a 64 kB direct-mapped cache with 16 bytes per line. a. How many lines are there in the cache? 7.21 A certain memory system has a 128 MB main memory and a 2 MB cache. Blocks are 32 bytes in size. Show the Felds in a memory address if the cache is a. associative b. direct-mapped c. 8-way set associative 1...
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This note was uploaded on 11/25/2010 for the course ECE 525.412 taught by Professor Charlesb.cameron during the Spring '10 term at Johns Hopkins.

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