SRC_2-BusSchematic

SRC_2-BusSchematic - 4-47 Chapter 4—Processor Design Fig 4.15 The 2-Bus SRC Microarchitecture A bus(“In bus” 32 32 general purpose registers

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: 4-47 Chapter 4—Processor Design Fig 4.15 The 2-Bus SRC Microarchitecture A bus (“In bus”) 32 32 general purpose registers 31 0 R0 B bus (“Out bus”) 32 R31 IR PC MA Memory bus MD A • Bus A carries data going into registers • Bus B carries data being gated out of registers • ALU function C = B is used for all simple register transfers A ALU C B Computer Systems Design and Architecture by V. Heuring and H. Jordan © 1997 V. Heuring and H. Jordan ...
View Full Document

This note was uploaded on 11/25/2010 for the course ECE 525.412 taught by Professor Charlesb.cameron during the Spring '10 term at Johns Hopkins.

Ask a homework question - tutors are online