Lam_MAScThesisAp03_Mixers

Lam_MAScThesisAp03_Mixers - 1.2V CMOS DOWN CONVERSION MIXER...

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Unformatted text preview: 1.2V CMOS DOWN CONVERSION MIXER AND VCO DESIGN FOR RF FRONT-END TRANSCEIVER APPLICATIONS By Jessica Ching-Yee Lam Bachelor of Engineering McMaster University, June 1996 A Thesis Submitted to the School of Graduate Studies In Partial Fulfilment of the Requirements For the Degree Master of Applied Science McMaster University, Ontario, Canada Copyright by Jessica Ching-Yee Lam, April 2003 ii APPROVAL Name: Jessica Ching-Yee Lam Degree: Master of Applied Science Title of Thesis: 1.2V CMOS Down Conversion Mixer and VCO Design for RF Front-end Transceiver Applications Senior Supervisor: _____________________________ Dr. M. J. Deen Professor McMaster University Department of Computer and Electrical Engineering Committee Member: _____________________________ Dr. P.M. Smith Professor McMaster University Department of Computer and Electrical Engineering Committee Member: _____________________________ Dr. M. Bakr Professor McMaster University Department of Computer and Electrical Engineering iii Abstract In the tremendous growth of wireless handheld devices, low power consumption becomes a major consideration in radio frequency integrated circuit (RFIC) designs. This thesis explores low power RFIC design for CMOS mixer and voltage-control-oscillator (VCO) through their applications in a RF front-end transceiver. Two CMOS down-conversion mixers are designed to operate at 1.2V for single battery solution. Both mixers perform frequency down-conversion from a 1.9GHz radio frequency (RF) input signal to a 250MHz intermediate frequency (IF) output signal. The mixer circuits have been fabricated in TSMC 0.18 m CMOS technology. The first mixer is implemented with an all-NMOS Gilbert cell topology. Low voltage operation is achieved by biasing the mixer core transistors near to the threshold voltage. At 1.2V, the measurement shows 4dB conversion gain, 11dB noise figure and 4dBm third-order input intercept point (IIP3). The second mixer is designed to improve the linearity (IIP3) performance. A CMOS g m cell technique is used to modify the first mixer at the same voltages operating as the first mixer. The second mixers measurement results were -1dB conversion gain, 14dB noise figure and 5dBm IIP3. Temperature effects on both circuits were also investigated. iv A VCO is a major component in a RF front-end transceiver. It can function as a local oscillator (LO) and provide LO input signal to the mixer for frequency translation. To realize the single battery solution, a CMOS LC-tuned VCO is investigated and designed with TSMC 0.18 m CMOS technology to operate at 1.2V voltage supply. The performance is simulated with Cadence SPECTRE simulator. The simulation shows a phase noise of 135dBc/Hz at 600kHz offset and a tuning range from 1.57GHz to 1.8GHz when the control voltage decreases from 1.5V to 0.5V through a pair of NMOS varactors. v Acknowledgement I would like to take this opportunity to thank Dr. M. J. Deen, my supervisor, for his guidance during the course of this work. his guidance during the course of this work....
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This note was uploaded on 12/04/2010 for the course ECE 123 taught by Professor Mais during the Spring '10 term at University of Calgary.

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Lam_MAScThesisAp03_Mixers - 1.2V CMOS DOWN CONVERSION MIXER...

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