HW5 - ECE 124A, Fall 2010, Hw#5 Prof. Kaustav Banerjee...

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ECE 124A, Fall 2010, Hw#5 Prof. Kaustav Banerjee 1 UNIVERSITY OF CALIFORNIA, SANTA BARBARA Department of Electrical and Computer Engineering ECE124A VLSI Principles Last modified on October 28, 2010 Homework #5 Due Date: Nov. 3 by 5:00pm Reading Assignment: Chapter 4, Sections 4.5- 4.9, and Chapter 6, Sections 6.1-6.2 CMOS VLSI Design: A Circuits and Systems Perspective (3rd Edition), Neil H. E. Weste and David Harris, Addison Wesley, 2005. 1. In a typical 2:1 CMOS inverter, if the PMOS can be made to operate at a lower temperature (say 20 degree C) than the NMOS (say 120 degree C), what will be the impact on: a) The voltage transfer curve (indicate with a sketch of the VTC) b) Inverter switching threshold c) Gain d) Delay e) Power (both switching and leakage) f) What can be done to the NMOS to make the inverter symmetric (without changing the temperature) g) Show that the capacitive power consumption ( P cap ) of a CMOS inverter is independent of the load capacitance ( C L ) when operating at its maximum speed. 2.
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HW5 - ECE 124A, Fall 2010, Hw#5 Prof. Kaustav Banerjee...

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