Unformatted text preview: once? b. Assuming that the power to drive the board comes from off chip, what is the maximum allow-able inductance of the power and ground supplies to the chip to limit the voltage drop and ground bounce to 0.25V? How many power/ground bumps will this require at 0.5 nH/bump? c. Assuming activity on the bus 15% of the time on average, with source termination (i.e. no DC power) estimate the average power to drive the DDR bus....
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- Fall '08
- Power, Symbiotic Bypass Estimation, d. symbiotic bypass, c. on-chip bypass, DDR communication bus