Ch4_Combinational_Logic

Ch4_Combinational_Logic - ECE 223 Digital Circuits and...

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1 Combinational Logic ECE 223 Digital Circuits and Systems
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2 Combinational Circuits ± consists of logic gates with outputs that are determined entirely by the present value of the inputs (no memory) ² Combinatorial circuits might be 2-level logic (SOP,POS) or multi- level ± Two important procedure ² Analysis – Given circuit schematic, explain its behavior ² Design – Given the specifications, build it
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3 Analysis Procedure 1. Label all logic gate outputs and primary inputs 2. Starting from primary inputs, represent outputs in terms of their input variables 3. Repeat 2, till you reach output 4. Represent primary output(s) in terms of primary inputs F 2 = AB +AC +BC T 1 = A +B +C T 2 = ABC T 3 = F 2 ’T 1 F 1 = T 2 +T 3 Simplify the F 1
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4 Design Procedure 1. From Specifications, determine the required number of inputs and outputs 2. Assign a variable to each input and output 3. Derive a truth Table that defines the required relationship between inputs and outputs 4. Perform logic minimization 5. Draw the logic diagram
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5 Design Procedure - Example ± Given input bits in BCD, design a circuit to convert inputs to Excess-3 code outputs 0 0 0 1 1 0 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 1 1 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 Output Excess-3 Code Input BCD z y x w D C B A 0 1 1 0 0 1 1 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 0 1 0 1
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6 Example – K maps z = D’ y = CD +C’D’ = CD + (C +D)’ x = B’C +B’D +BC’D’ = B’(C +D) +B(C +D)’ w = A +BC +BD = A +B(C+D)
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7 Example – Schematic
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8 Binary Adder ± Adder is an important component in many logic circuits ± Half Adder (CS) 2 = x plus y S = x’y +xy’ = x y C = xy S C y x 1 0 0 0 0 1 1 0 1 1 0 0 1 0 1 0 xy CS HA
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9 Full Adder 1 1 1 0 1 0 0 0 C 0 1 1 0 1 0 0 1 0 1 0 1 0 0 1 1 S z y x 1 0 1 0 1 1 1 0 1 0 0 0 1 1 0 0 (CS) 2 = x plus y plus z
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10 Full Adder – K Maps & Schematics S x x y y z z y x x y z 00 01 00 1 0 0 1 yz x 1 1 0 1 11 10 S = x’y’z +x’yz’ + xy’z’ + xyz = x y z C = xy +xz +yz S C
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11 Implementation with 2 Half Adders xyz S C FA c 2 y x HA z C HA s 1 c 1
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This note was uploaded on 12/07/2010 for the course EE ee012 taught by Professor Razarahim during the Winter '10 term at NUCES.

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Ch4_Combinational_Logic - ECE 223 Digital Circuits and...

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