Ch6_Registers_and_Counters_Kenning

Ch6_Registers_and_Counters_Kenning - Registers A single...

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E&CE 223 Digital Circuits and Systems Page 1 Registers ± A single flip-flop stores one bit of information. ± A collection of n flip-flops stores n bits of information – these flip-flops form what is called an n-bit register.
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E&CE 223 Digital Circuits and Systems Page 2 Registers ± Illustration of a 4-bit register. ² When clear=0 , all flip-flop outputs are forced to zero (active low reset). ² When clear=1 , the rising edge of the clock (the active clock edge), results in the 4-bit input transferred to register output. DQ R R R R clock clear I3 I2 I1 I0 A3 A2 A1 A0
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E&CE 223 Digital Circuits and Systems Page 3 Register With Parallel Load ± We might want to prevent the transfer of data from input to output even though the active clock edge arrives. ² I.e., we want the register to hold its current value . ± We can do this by feeding the register outputs back to the inputs and adding some additional logic to control the register operation.
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E&CE 223 Digital Circuits and Systems Page 4 Register With Parallel Load DQ R R R R clock clear I3 I2 I1 I0 A3 A2 A1 A0 load
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E&CE 223 Digital Circuits and Systems Page 5 Register With Parallel Load ± When load=1 , the data inputs reach the D-input of the flip-flop. ² When the active clock edge arrives, the data gets transferred, or loaded , to the register output. ± When load=0 , the data output of each flip-flop is fed back to its D-input. ² When the active clock edge arrives, the data input gets transferred to the register output, but since the values are the same for all flip-flops, the register holds its current value.
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E&CE 223 Digital Circuits and Systems Page 6 An Aside… Different Register Functions ± To permit loading or holding of data, we have, in effect simply placed a multiplexer in from each flip-flop input in order to “direct” the correct information to the flip-flop inputs to obtain our desired operation. ² In our previous example of parallel load, the AND/OR gates are working as a multiplexer – the load signal is the multiplexer control line.
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E&CE 223 Digital Circuits and Systems Page 7 Shift Registers ± Might want a register that can shift data serially in a direction… This type of register is called a shift register . ± Illustration of a 4-bit shift register. DQ R R R R clock serial in serial out clear ± As active clock edges arrive, the data present at the serial input gets transferred towards the serial output – so, data gets shifted to the right one bit at a time as clock edges arrive.
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E&CE 223 Digital Circuits and Systems Page 8 Universal Shift Registers ± Perhaps we want a more general circuit – e.g., we want to be able to clear the register, load the register, and perform both a shift right and a shift left operation. ± We can do this by adding addition logic in front of each flip-flop in the register: ² We need to make sure the correct data is present at the D-input to each flip- flop to perform each operation correctly according to the settings on the register control lines.
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Ch6_Registers_and_Counters_Kenning - Registers A single...

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