problem4-26 - PROBLEM 4.26 KNOWN: Chip dimensions, contact...

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PROBLEM 4.26 KNOWN: Chip dimensions, contact resistance and substrate material. FIND: Maximum allowable chip power dissipation. SCHEMATIC: -6 2 t,c R = 5 × 10 m K/W Chip (T c = 85°C) Copper substrate (T 2 = 25°C; k = 400 W/m·K) ASSUMPTIONS: (1) Steady-state conditions, (2) Constant properties, (3) Negligible heat transfer from back of chip, (4) Uniform chip temperature, (5) Infinitely large substrate, (6) Negligible heat loss from the exposed surface of the substrate. PROPERTIES: Table A.1, copper (25 ° C): k = 400 W/m K. ANALYSIS: For the prescribed system, a thermal circuit may be drawn so that q c T c R t,c R t,sub T 2 T 1 where T 1 is the temperature of the substrate adjacent to the top of the chip. For an infinitely thin square object in an infinite medium we may apply Case 14 of Table 4.1 ( = 0.932) resulting in * ss q * ss s 1 2 c q = q kA (T - T )/L where L c = 1/2 2 ss (A /4 π ) ; A = 2W c Recognizing that the bottom surfaces of the chip and substrate are insulated, the heat loss to the substrate may be determined by combining the preceding equations and dividing by 2 (to account for no heat losses from the bottom of the chip) resulting in
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This note was uploaded on 12/07/2010 for the course MAE Heat Trans taught by Professor Lee,j.s. during the Spring '10 term at Seoul National.

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problem4-26 - PROBLEM 4.26 KNOWN: Chip dimensions, contact...

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