problem4-31 - PROBLEM 4.31 KNOWN Dimensions of chip array...

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PROBLEM 4.31 KNOWN: Dimensions of chip array. Conductivity of substrate. Convection conditions. Contact esistance. Expression for resistance of spreader plate. Maximum chip temperature. r F IND: Maximum chip heat rate. SCHEMATIC: ASSUMPTIONS: (1) Steady-state, (2) Constant thermal conductivity, (3) Negligible radiation, (4) All heat transfer is by convection from the chip and the substrate surface (negligible heat transfer from ottom or sides of substrate). b ANALYSIS: From the thermal circuit, ( ) h h h sp h,cnv t,c sp,cnv t sp T T T T q q q R R R R = + = + + + ( ) ( ) ( ) 1 1 1 2 2 2 h,cnv s,h h R h A hL 100W / m K 0.005m 400K / W = = = = ( ) ( )( ) 3 5 7 r r r r t sp sub h 1 1.410A 0.344A 0.043A 0.034A 1 0.353 0.005 0 0 R 0.408K / W 4k L 4 80 W / m K 0.005m + + + + + + = = = ( ) 4 2 t,c t,c 2 2 h R 0.5 10 m K / W R 2.000K / W L 0.005m ′′ × = = = ( ) ( ) 1 1 2 2 2 sp,cnv sub s,h R h A A
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