PROBLEM 4.74
KNOWN:
Silicon chip mounted in a dielectric substrate.
One surface of system is convectively
ooled while the remaining surfaces are well insulated.
c
F
IND:
Whether maximum temperature in chip will exceed 85
°
C.
SCHEMATIC:
ASSUMPTIONS:
(1) Steadystate conditions, (2) Twodimensional conduction, (3) Negligible
contact resistance between chip and substrate, (4) Upper surface experiences uniform convection
oefficient, (5) Other surfaces are perfectly insulated.
c
ANALYSIS:
Performing an energy balance on the chip assuming it is
perfectly insulated from
the
substrate, the maximum temperature occurring at the interface with the dielectric substrate will be,
ccording to Eqs. 3.43 and 3.46,
a
(
)
(
)
(
)
(
)
7
3
7
3
2
2
max
2
c
q
H/4
q
H/4
10
W/m
0.003 m
10
W/m
0.003 m
T
T
20 C
80.9 C.
2k
h
2
50 W/m
K
500 W/m
K
∞
=
+
+
=
+
+
=
×
⋅
⋅
D
D
±
±
Since T
max
< 85
°
C for the assumed situation, for the actual twodimensional situation with the
onducting dielectric substrate, the maximum temperature should be less than 80
°
C.
c
Using the suggested grid spacing of 3 mm, construct the
nodal network and write the finitedifference equation for
each of the nodes taking advantage of symmetry of the
system.
Note that we have chosen to
not
locate nodes on
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 Spring '10
 LEE,J.S.
 Heat Transfer, Tmax, maximum temperature

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