Lec-03-CombImpl - C binational Logic I m m ntation om ple e...

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CS 150 - Fall 2000 - Combinational Implementation - 1 Combinational Logic Implementation Two-level logic Implementations of two-level logic NAND/NOR Multi-level logic Factored forms And-or-invert gates Time behavior Gate delays Hazards Regular logic Multiplexers Decoders PAL/PLAs ROMs
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CS 150 - Fall 2000 - Combinational Implementation - 2 Implementations of Two-level Logic Sum-of-products AND gates to form product terms (minterms) OR gate to form sum Product-of-sums OR gates to form sum terms (maxterms) AND gates to form product
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CS 150 - Fall 2000 - Combinational Implementation - 3 Two-level Logic using NAND Gates Replace minterm AND gates with NAND gates Place compensating inversion at inputs of OR gate
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CS 150 - Fall 2000 - Combinational Implementation - 4 Two-level Logic using NAND Gates (cont’d) OR gate with inverted inputs is a NAND gate de Morgan's: A' + B' = (A • B)' Two-level NAND-NAND network Inverted inputs are not counted In a typical circuit, inversion is done once and signal distributed
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CS 150 - Fall 2000 - Combinational Implementation - 5 Two-level Logic using NOR Gates Replace maxterm OR gates with NOR gates Place compensating inversion at inputs of AND gate
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CS 150 - Fall 2000 - Combinational Implementation - 6 Two-level Logic using NOR Gates (cont’d) AND gate with inverted inputs is a NOR gate de Morgan's: A' • B' = (A + B)' Two-level NOR-NOR network Inverted inputs are not counted In a typical circuit, inversion is done once and signal distributed
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CS 150 - Fall 2000 - Combinational Implementation - 7 OR NAND NAND OR AND NOR NOR AND Two-level Logic using NAND and NOR Gates NAND-NAND and NOR-NOR networks de Morgan's law: (A + B)' = A' • B' (A • B)' = A' + B' written differently: A + B (A' • B')’ (A • B) (A' + B')' In other words –– OR is the same as NAND with complemented inputs AND is the same as NOR with complemented inputs NAND is the same as OR with complemented inputs NOR is the same as AND with complemented inputs
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CS 150 - Fall 2000 - Combinational Implementation - 8 A B C D Z A B C D Z NAND NAND NAND Conversion Between Forms Convert from networks of ANDs and ORs to networks of NANDs and NORs Introduce appropriate inversions ("bubbles") Each introduced "bubble" must be matched by a corresponding "bubble" Conservation of inversions Do not alter logic function Example: AND/OR to NAND/NAND
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CS 150 - Fall 2000 - Combinational Implementation - 9 Z = [ (A B)' • (C • D)' ]' = [ (A' + B') (C ' + D') = [ (A' + B')' + (C ' + D')' ] = (A B) + (C • D) Conversion Between Forms (cont’d) Example: verify equivalence of two forms A B C D Z A B C D Z NAND NAND NAND
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CS 150 - Fall 2000 - Combinational Implementation - 10 Step 2 conserve "bubbles" Step 1 conserve "bubbles" NOR NOR NOR \A \B \C \D Z NOR NOR A B C D Z Conversion Between Forms (cont’d) Example: map AND/OR network to NOR/NOR network A B C D Z
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CS 150 - Fall 2000 - Combinational Implementation - 11 Z = { [ (A' + B')' + (C ' + D')' ]' }' = { (A' + B') (C ' + D') = (A' + B')' + (C ' + D')' (A B) + (C D) Conversion Between Forms (cont’d) Example: verify equivalence of two forms A B C D Z NOR NOR NOR \A \B \C \D Z
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This note was uploaded on 12/15/2010 for the course ECE 271 taught by Professor Garrisongreenwood during the Spring '10 term at Pohang University of Science and Technology.

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Lec-03-CombImpl - C binational Logic I m m ntation om ple e...

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