The_Intel_8088_Architecture_and_Instruction_Set

The_Intel_8088_Archi - E L E C 4 6 4 M I C RO C O M P U T E R S Y S T E M D E S I G N 1 9 9 6/9 7 WIN TER S ES S IO N T ERM 1 The Intel 8088

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ELEC 464 : MICROCOMPUTER SYSTEM DESIGN 1996/97 WINTER SESSION TERM 1 The Intel 8088 Architecture and Instruction Set This lecture describes a subset of the 8088 architecture and instruction set. While it’s not possible to cover all the details of the 8088 in one lecture you should learn enough about the 8088 to be able to: write simple program in 8088 assembly language including: (1) transfer of 8 and 16-bit data between registers and memory using register, immediate, direct, and register indirect addressing, (2) some essential arithmetic and logic instructions on byte and 16-bit values, (3) stack push/pop, (4) input/output, (5) [un]conditional branches, (6) call/return, (7) interrupt/return, (8) essential pseudo-ops (org, db, dw). compute a physical address from segment and offset values, describe response of 8088 to NMI, software (INT) and external (IRQ) interrupts and return from interrupts. History The original Intel 16-bit CPU was the 8086. It was designed to be backwards-compatible at the assem- bler level with Intel’s 8-bit CPU, the 8080. The 8088 is a version of the 8086 with an 8-bit data bus. The 8088 was used in the original IBM PC and its many clones. Later versions of the 8086 include the i386 which extends the data and address registers to 32 bits and includes support for memory protection and virtual memory. Registers The 8088 includes has four 16-bit data registers (AX, BX, CX and DX). BX can also be used as an address register for indirect addressing. The most/least sig- nificant byte of each register can also be addressed directly (e.g. AL is the LS byte of AX, CH is MS byte of CX). Three bits in a 16-bit program status word (PSW) are used to indicate whether the result of the previ- ous arithmetic/logical instruction was zero, negative, or generated a carry. An interrupt enable bit controls whether interrupt requests on the IRQ pin are recog- nized. The address of the next instruction to be executed is held in a 16-bit instruction pointer (IP) register (the “program counter”). Exercise: How many bytes can be addressed by a 16- bit value? A 16-bit stack pointer (SP) is used to imple- ment a stack to support subroutine calls and inter- rupts/exceptions. There are also three segment registers (CS, DS,
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This note was uploaded on 12/18/2010 for the course ME 22 taught by Professor Rashid during the Spring '10 term at Superior University Lahore.

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The_Intel_8088_Archi - E L E C 4 6 4 M I C RO C O M P U T E R S Y S T E M D E S I G N 1 9 9 6/9 7 WIN TER S ES S IO N T ERM 1 The Intel 8088

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