Chap8-decision-2 - Overview Compare instruction mechanism...

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Overview ° Compare instruction mechanism ° Flag setting Instructions ° Conditional Instructions ° Conclusion Review (#1/2) ° HLL decisions (if, case) and loops (while, for) use same assembly instructions Compare instruction: cmp in ARM Conditional branches: beq , bne, bgt, blt, etc in ARM Unconditional branches: b , and mov pc, rn in ARM Switch/Case: chained if-else or jump table + ldr pc, [ ] ldr pc, [ ] is VERY POWERFUL!
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Review (#2/2) ° Some Branch Conditions after cmp instruction: ° b Unconditional ° bal Branch Always ° beq Branch Equal ° bne Branch Not Equal ° blt Branch Less Than ° ble Branch Less Than or Equal ° bgt Branch Greater Than ° bge Branch Greater Than or Equal Review: Branches: PC-relative addressing ° Recall register r15 in the machine also called PC ; ° points to the currently executing instruction ° Most instruction add 4 to it. (pc increments by 4 after execution of most instructions) ° Branch changes it to a speciFc value ° Branch adds to it 24-bit signed value (contained in the instruction) Shifted left by 2 bits ° Labels => addresses memory 0: FFF. .. registers r14 r0 r15 = pc beq address b address –32MB +32MB 24 bits
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Review: Status Flags in Program Status Register CPSR Copies of the ALU status flags (latched for some instructions). Mode 28 31 8 4 0 I F T Flags After cmp Instruction Negative (N=‘1’) Bit 31 of the result has been set. Indicates a negative number in signed operations Zero (Z=‘1’) Result of operation was zero. Carry (C=‘1’) Result was greater than 32 bits (for unsigned arithmetic, bit 31 is the magnitude bit , and not the sign bit ). oVerflow (V=‘1’) Result was greater than 31 bits (for signed arithmetic bit 31 is the sign bit and not the magnitude bit ). Indicates a possible corruption of the sign bit in signed numbers (carry into the msb carry out of msb) cmp r1, r2 ; update Flags after r1–r2 Cmp Instructions and CPSR Flags (#1/3) x1xx = Z set (equal)(eq) x0xx = Z clear (not equal)(ne) xx1x = C set (unsigned higher or same) (hs/cs) xx0x = C clear (unsigned lower) (lo/cc) x01x = C set and Z clear (unsigned higher)(hi) 1xxx = N set (negative) (mi) 0xxx = N clear (positive or zero) (pl) 28 31 24 20 16 12 8 4 0 N Z C V cmp r1, r2 ;Update flags after r1–r2 xx0x OR x1xx = C clear or Z set (unsigned lower or same)(ls) CPSR
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Cmp Instructions and CPSR Flags (#2/3) xxx1 = V set (signed overfow)(vs) xxx0 = V clear (signed no overfow) (vc) 1xx1 = N set and V set (signed greater or equal (ge) 0xx0 = N clear and V clear (signed greater or equal)(ge) 1xx0 = N set and V clear (signed less than) (lt) 0xx1 = N clear and V set (signed less than) (lt) 10x1 = Z clear, and N set and V set (signed greater)(gt) 00x0 = Z clear, and N clear and V clear (signed greater) (gt) 28 31 24 20 16 12 8 4 0 N Z C V N = V (signed greater or equal (ge) N V (signed less than) (lt) Z clear AND (N =V) (signed greater than) (gt) CPSR cmp r1, r2 ;Update flags after r1–r2 cmp Instructions and CPSR Flags (#3/3) x1xx = Z set (equal)(eq) 1xx0 = N set and V clear (signed less) (le)
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This note was uploaded on 12/20/2010 for the course CSC CSCC85 taught by Professor Lorincz during the Spring '10 term at University of Toronto- Toronto.

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Chap8-decision-2 - Overview Compare instruction mechanism...

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