Chap11-exception-1 - Overview Instruction Set Support for...

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Unformatted text preview: Overview Instruction Set Support for Exceptions Privileged vs User modes of operation. Handling a Single Interrupt Review I/O gives computers their 5 senses I/O speed range is million to one Processor speed means must synchronize with I/O devices before use Polling works, but expensive processor repeatedly queries devices Interrupts works, more complex Defnitions For Clarifcation Exception : signal marking that something out oF the ordinary has happened and needs to be handled. Caused by internal and external sources Interrupt : Externally asynchronous exception (by I/Os) SoFtware Interrupt (SWI) : User defned synchronous exception Trap : Processor s diversion to a code to handle exception-Latency -Time between when interrupt is asserted to when Interrupt Service Routine begins execution (3 to 9 s on 8051if no other interrupts can occur.) See Chap 6.7 in text. May be increased substantially by time spent in higher or same priority interrupt routines.- Critical Sections- block of code (perhaps in main program) where interrupts must be disabled - This increases worst case possible latency.-Interrupt Density- Percentage of time processor spends servicing interrupts example - interrupt event occurs every 10 msec.-take 2 msec to service Density = 2/10 x 100% = 20%-As Density approaches 100%, processor becomes Interrupt Bound(All processor time is used to service interrupts.) example Int 1 occurs with frequency F1 time per sec. and takes T1 sec. to complete. (Note frequency = 1/(time period)) Int 2 has f = F2, takes T2 Int 3 has f = F3, takes T3 Density = F1xT1 + F2xT2 + F3xT3 <100% to guarantee that all interrupts get service However it may take too long to service a particular interrupt Exercise: Calculate the interrupt density for a T0 interrupt which occurs every 10ms. which takes 100microsec. to service. Latency and Transfer Rate If a device can transfer 1 word every T seconds the transfer rate is 1/T Hz. This does not mean that the device can actually transfer N words in NxT seconds. There is a very important type of delay called latency which is the time before the Frst word is transferred. In many cases the latency reduces the real data rate substantially from what one might assume from the transfer. This is true for RAM memory but especially for mechanical devices like hard drives and CD ROMs. Example of Exception Sources in ARM Externally generated interrupts An attempt by the processor to execute an undeFned instruction Accessing privileged operating system functions via software interrupts (SWI). Print Access Ethernet I/O Interrupt An I/O interrupt is like an undefned instruction exceptions except: An I/O interrupt is asynchronous More inFormation needs to be conveyed An I/O interrupt is asynchronous with respect to instruction execution: I/O interrupt is not associated with any instruction, but it can happen in the middle oF any given instruction...
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This note was uploaded on 12/20/2010 for the course CSC CSCC85 taught by Professor Lorincz during the Spring '10 term at University of Toronto- Toronto.

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Chap11-exception-1 - Overview Instruction Set Support for...

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