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Unformatted text preview: a place of mind _ [_
Electrical and Enmputer Engineering NAME: ”_ 2“  zrxiwzein EECE256 Midterm: Section 101 and 102 Dr. Sidney FeIs 8!. Steve Oidridge
90 min closed bunk. calculator allowed Student Name: Section # 1. You are required by yeur manager te design a 4—bit prime numher checker
[i.e. you want tn output 1 if the binary number is prime: den't forget, U and 1
are net prime numhers]. 3. Shaw the truth table for the prime numher checker. [4 marks]
{or y: 3: Wu} If: ,5»?
a a? :3 0 (.9 ' you may may the back if needed EECEZ'EE Midterm Zﬂlﬂ Fage 1 Bf 6 a place of mind {p /
Electrical and Computer Engineering NAME: 37 ,é‘? 2 2?;‘1ilf2ﬁlﬂ b. Design the circuit using a single 81:1 multiplexer and a minimal
number of extra AND, UR or NUT gates if needed [i.e., no HAND. NDR. KDR or KNEE. etc). Show your work including any simpliﬁcations
done. 1sou must show the ﬁnal logic diagram with all the pins of the
multiplexer labelled properly. State any assumptions that you make [ti marks] c. Ilesign the circuit using a single 41:1 multiplexer and a minimal
number of extra AM I), DR or NUT gates if needed [l.e., no HAND, MGR.
xoa or XNUR. etc). Show your work including any simpliﬁcations
done.‘l’ou must show the ﬁnal logic diagram with all the pins of the
multiplexer labelled properly. State any assumptions that you make [4 marks] you may use the back if needed EECE ass Midtertjn Zillﬁ Page 2 of E a place of mind Electrical 311$ Coﬂputer Eeginelerlng NAME:
4. ﬂ" .1!
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2. Draw a logle :1th using a minimal number of MEIR gete's [2, 31 and 4 input
gates are allowed] to implement the following function {8 marks): F{A,B,C,D] = [[[A‘ + B’ + C). o)@@* 1+ {c  1:3]
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‘E'kh4{£o~3HnE5 (Ly£95. you may use the heck lfneeded EEEEZ 55MldM'Zﬂ 1E FREE 3 {if E} a place of mind Electrical and Computer Engineering NAME: 4 rﬁé; 2?;1ﬂf2ﬂ1ﬂ 3. Simplifyr thefnllowing Enalean ﬁmction using a Karmugh map: (4 marks} Ragga] = xyz + wy + my," + f}? you may use the hack ifneudad EEEEZSE Midtermﬁﬂ lﬂ' Page 4 of 6 aplaceof mind , fez
Electrical and Computer Engineering NHME’.._4;_S— Ziflﬂfzmi} 4. Using axe decoders and one lloll multiplexer. design a circuit with the following
properties: it has two 2bit binary number inputs [in xnjtyr yo] and I . : i 7,;
.  WWto selef’irthéfufction of the circuit:
EQ outputs a 1 if the two inputs are equal GT outputs a 1 lithe X is larger than Y LTE outputs a 1 if the it is smaller or equal to ‘i’ NULL outputs a [l Cl
C:
II]
CI You must use a minimum number of 25:4 decoders with enables [Le if enable is ll all
outputs are D erwise,_the output is 1 for the minterm] and a minimum number of additional gates. aegis“ .
53%! M Show the circuit diagram with all the pins to the d
labelled properly. State v : 1   ' : tin ecoders and multiplead's
you are making in your design. [12.marks) : __ any assumptions you may use me back if needed EECEZEE Midtermiiillil Page 5 will" 5 a place of mind i ,ﬁ I,
Electrical and Computer Engineering NAME: '3' ' 1‘75" ‘9 2?;1nxzu1n Extra space. If needed. you may use I113 back if Headed EECEZEE Midterm 2H1“ Page {I {If 5 ...
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